Research Article
Optimizing Current Characteristics of 32 nm FinFET by Controlling Fin Width
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Communications on Applied Electronics
Foundation of Computer Science (FCS), NY, USA
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| Volume 2 - Issue 7 |
| Published: August 2015 |
| Authors: Neha Somra, Kanika Mishra, Ravinder Singh Sawhney |
10.5120/cae2015651795
|
Neha Somra, Kanika Mishra, Ravinder Singh Sawhney . Optimizing Current Characteristics of 32 nm FinFET by Controlling Fin Width. Communications on Applied Electronics. 2, 7 (August 2015), 1-5. DOI=10.5120/cae2015651795
@article{ 10.5120/cae2015651795,
author = { Neha Somra,Kanika Mishra,Ravinder Singh Sawhney },
title = { Optimizing Current Characteristics of 32 nm FinFET by Controlling Fin Width },
journal = { Communications on Applied Electronics },
year = { 2015 },
volume = { 2 },
number = { 7 },
pages = { 1-5 },
doi = { 10.5120/cae2015651795 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2015
%A Neha Somra
%A Kanika Mishra
%A Ravinder Singh Sawhney
%T Optimizing Current Characteristics of 32 nm FinFET by Controlling Fin Width%T
%J Communications on Applied Electronics
%V 2
%N 7
%P 1-5
%R 10.5120/cae2015651795
%I Foundation of Computer Science (FCS), NY, USA
Abstract
The FinFET transistor structure assures to rejuvenate the chip industry by rescuing it from the short-channel effects that limits the device scalability endured by current planar transistor structures. In this thesis, we report the design, fabrication and physical characteristics of n-channel FinFET with physical gate length of 32nm using visual TCAD (steady state analysis). All the measurements were performed at a supply voltage of 1.5V and 5 nm oxide thickness. We report the drain saturation current is 0.0343453mA at Vg=1V and 0.0410523mA at Vg=1.5V which indicates approximately 20 percent hike in Id with increase in 0.5V gate voltage. We simulate the device for distinct fin thickness from 5 nm to 50 nm. In this thesis we report, for 32 nm gate length FinFET having above 21.33 nm fin width would consequence in short channel effects in spite of having high drain current.
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